CMSIS-CORE study notes

CMSIS-CORE Overview

file:///L:/FongMpu/cmsis/CMSIS/Documentation/Core/html/index.html

CMSIS-CORE implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:

Hardware Abstraction Layer (HAL) for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.

System exception names to interface to system exceptions without having compatibility issues.

Methods to organize header files that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.

Methods for system initialization to be used by each MCU vendor. For example, the standardized SystemInit() function is essential for configuring the clock system of the device.

Intrinsic functions used to generate CPU instructions that are not supported by standard C functions.

A variable to determine the system clock frequency which simplifies the setup the SysTick timer.

This chapter provides details about the CMSIS-CORE and contains the following sections:

Using CMSIS in Embedded Applications describes the project setup and shows a simple program example.

Template Files describes the files of the CMSIS-CORE in detail and explains how to adapt template files provided by ARM to silicon vendor devices.

MISRA-C:2004 Compliance Exceptions describes the violations to the MISRA standard.

Reference describe the features and functions of the Device Header File <device.h> in detail.

Data Structures describe the data structures of the Device Header File <device.h> in detail.



Using CMSIS in Embedded Applications

To use the CMSIS-CORE the following files are added to the embedded application:

Startup File startup_<device>.s with reset handler and exception vectors.

System Configuration Files system_<device>.c and system_<device>.h with general device configuration (i.e. for clock and BUS setup).

Device Header File <device.h> gives access to processor core and all peripherals.

Note

The files Startup File startup_<device>.s and System Configuration Files system_<device>.c and system_<device>.h may require application specific adaptations and therefore should be copied into the application project folder prior configuration. The Device Header File <device.h> is included in all source files that need device access and can be stored on a central include folder that is generic for all projects.

The Startup File startup_<device>.s is executed after reset and calls SystemInit. After the system initialization control is transferred to the C/C++ run-time library which performs initialization and calls the main function in the user code. In addition the Startup File startup_<device>.s contains all exception and interrupt vectors and implements a default function for every interrupt. It may also contain stack and heap configurations for the user application.

The System Configuration Files system_<device>.c and system_<device>.h performs the setup for the processor clock. The variable SystemCoreClock indicates the CPU clock speed. System and Clock Configuration describes the minimum feature set. In addition the file may contain functions for the memory BUS setup and clock re-configuration.

The Device Header File <device.h> is the central include file that the application programmer is using in the C source code. It provides the following features:

Peripheral Access provides a standardized register layout for all peripherals. Optionally functions for device-specific peripherals may be available.

Interrupts and Exceptions (NVIC) can be accessed with standardized symbols and functions for the Nested Interrupt Vector Controller (NVIC) are provided.

Intrinsic Functions for CPU Instructions allow to access special instructions, for example for activating sleep mode or the NOP instruction.

Intrinsic Functions for SIMD Instructions [only Cortex-M4] provide access to the DSP-oriented instructions.

Systick Timer (SYSTICK) function to configure and start a periodic timer interrupt.

Debug Access are functions that allow printf-style I/O via the CoreSight Debug Unit and ITM communication.

.END