Getting Started: Creating Applications with μVision Page 39
C/C++ Compiler
The ARM C/C++ compiler is designed to generate fast and compact code for the
ARM7, ARM9 and Cortex-Mx processor architectures; while the Keil ANSI C
compilers target the 8051, C166, XE166, and XC2000 architectures. They can
generate object code that matches the efficiency and speed of assembly
programming. Using a high-level language like C/C++ offers many advantages
over assembly language programming:
Knowledge of the processor instruction set is not required. Rudimentary
knowledge of the microcontroller architecture is desirable, but not necessary.
Details, like register allocation, addressing of the various memory types, and
addressing data types, are managed by the compiler
Programs receive a formal structure (imposed by the C/C++ programming
language) and can be split into distinct functions. This contributes to source
code reusability as well as a better application structure.
Keywords and operational functions that resemble the human thought
process may be used
Software development time and debugging time are significantly reduced
You can use the standard routines from the run-time library such as
formatted output, numeric conversions, and floating-point arithmetic
Through modular programming techniques, existing program components
can be integrated easily into new programs
The C/C++ language is portable (based on the ANSI standard), enjoys wide
and popular support, and is easily obtained for most systems. Existing
program code can be adapted quickly and as needed to other processors.
Object-HEX Converter
The object-hex converter creates Intel HEX files from absolute object modules
that have been created by the linker. Intel HEX files are ASCII files containing a
hexadecimal representation of your application program. They are loaded easily
into a device program for writing to ROM, EPROM, FLASH, or other
programmable memory. Intel HEX files can be manipulated easily to include
checksum or CRC data.
Linker/Locator
The linker/locator combines object modules into a single, executable program. It
resolves external and public references and assigns absolute addresses to relocatable
program segments. The linker includes the appropriate run-time library
modules automatically and processes the object modules created by the Compiler
and Assembler. You can invoke the linker from the command line or from
within the μVision IDE. To accommodate most applications, the default linker
directives have been chosen carefully and need no additional options. However,
it is easy to specify additional custom settings for any application.
Library Manager
The library manager creates and maintains libraries of object modules (created by
the C/C++ Compiler and Assembler). Library files provide a convenient way to
combine and reference a large number of modules that may be used by the linker.
The linker includes libraries to resolve external variables and functions used in
applications. Modules from libraries are extracted and added to programs only if
required. Modules, containing routines that are not invoked by your program
specifically, are not included in the final output. Object modules extracted by the
linker from a library are processed exactly like other object modules.
There are a number of advantages to using libraries: security, speed, and
minimized disk space are only a few. Libraries provide a vehicle for distributing
large numbers of functions and routines without distributing the original source
code. For example, the ANSI C library is supplied as a set of library files.
You can build library files (instead of executable programs) using the μVision
Project Manager. To do so, check the Create Library check box in the
Options for Target — Output dialog. Alternatively, you may invoke the
library manager from the Command Window.
Chapter 4. RTX RTOS Kernel
This chapter discusses the benefits of using a Real-Time Operating System
(RTOS) and introduces the features available in Keil RTX Kernels. Note that the
Keil development tools are compatible with many third-party RTOS solutions.
You are not bound to use Keil RTX; however, the RTX Kernels are well
integrated into the development tools and are feature-rich, and well tailored
towards the requirements of deeply embedded systems.
Software Concepts
There are two basic design concepts for embedded applications:
Endless Loop Design: this design involves running the program as an
endless loop. Program functions (tasks) are called from within the loop,
while interrupt service routines (ISRs) perform time-critical jobs including
some data processing.
RTOS Design: this design involves running several tasks with a Real-Time
Operating System (RTOS). The RTOS provides inter-task communication
and time management functions. A preemptive RTOS reduces the
complexity of interrupt functions, since time-critical data processing is
performed in high-priority tasks.
Endless Loop Design
Running an embedded program in an endless loop is an adequate solution for
simple embedded applications. Time-critical functions, typically triggered by
hardware interrupts, are executed in an ISR that also performs any required data
processing. The main loop contains only basic operations that are not time critical,
but which are executed in the background.
This software concept requires only one stack area and is very well suited for
devices with limited memory. Architectures that provide several interrupt levels
allow complex low-level ISR functions. Time-critical jobs may execute in higher
interrupt levels.
8051, C166/XE166/XC2000, and ARM Cortex-Mx microcontrollers provide
several interrupt levels. Higher-level interrupts may halt lower-level interrupts,
or the main function.
It is impossible to suspend the execution of an ISR except through higher priority
interrupts. Therefore, the timing of a system with many complex ISR levels is
unpredictable, since high priority interrupts may take up most of the CPU time.
Another challenge is to determine the worst-case stack nesting. Applications
with complex ISR designs can have unnoticed stack resource issues, which may
cause sporadic execution faults. Note, that the ARM architecture provides an
extra stack for ISR that avoids stack memory surprises during the main loop
execution.
RTOS Design
The RTOS design, due to its very nature, allows several tasks to execute within
sequential time slices. A preemptive RTOS provides task priority levels, in
which high priority tasks interrupt the execution of low priority tasks. Most
RTOS systems offer inter-task communication and time delay functions
supporting the design of complex applications.
The ARM based architectures are designed for RTOS usage. An RTOS is almost
mandatory on ARM7, ARM9, and Cortex-Mx based systems that have several
interrupt sources. ARM devices provide a separate ISR stack, and hence, each
task needs no additional stack for ISR execution (as required on 8051 and
C166/XE166/XC2000 devices).
A preemptive RTOS supports multiple task priorities. Tasks with the same
priority are executed in sequence; tasks with a higher priority suspend tasks with
a lower priority. An ISR always interrupts task execution and may exchange data
with other tasks.
...
Interrupt Service Routines (Page 50)
An interrupt is an asynchronous signal from the hardware or software that forces
the microcontroller to save the execution state. Interrupts trigger a context
switch to an interrupt handler. Software interrupts are implemented as
instructions in the instruction set of the microcontroller and work similar to
hardware interrupts. Interrupts can be classified as a:
Maskable interrupt (IRQ) – a hardware interrupt that can be ignored by
setting a bit in a bit-mask
Non-maskable interrupt (NMI) – a hardware interrupt that cannot be
configured and thus cannot be ignored
Software interrupt – generated within a processor by executing an instruction
RTX ensures that interrupts execute correctly and leaves the machine in a well defined
state. Interrupt service routines, also known as interrupt handlers, are
used to service hardware devices and transitions between operation modes, such
as system calls, system timers, disk I/O, power signals, keystrokes, watchdogs;
other interrupts transfer data using UART or Ethernet.
...
Another important concept is the interrupt latency, which is defined as the period
between the generation and servicing of that interrupt. This is especially
important in systems that need to control machinery in real time, and therefore
require low interrupt latency. RTX ensures that a subroutine will finish its
execution in an agreed maximum length of time and that the interrupt latency
does not exceed a predefined maximum length of time.
The general logic of an ISR looks like the following code example.
...
.END
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